HDL Technical Lead (FPGA)
Location: Boulder, COSalary Range: $150,000 – $250,000
Overview
A growing RF technology company is seeking an experienced HDL Technical Lead to provide architectural direction and technical leadership across multiple FPGA development programs.
This position is designed for a senior engineer who enjoys leading through technical expertise rather than formal people management. The role combines system-level decision making, cross-program coordination, and hands-on engineering, with approximately 50% of time spent in design, tooling, and complex problem solving.
You will support multiple concurrent programs, helping teams align on architecture, improve design reuse, and make sound technical tradeoffs while ensuring consistent execution across projects.

Key Responsibilities


Provide technical leadership for FPGA/HDL development across 3–4 concurrent programs


Define and guide system-level architecture aligned with program requirements and long-term platform strategy


Identify and drive reuse of IP, architecture, and development tools to improve efficiency and consistency


Lead design reviews, technical planning, and cross-team coordination to maintain quality and schedule


Contribute directly to:


Specialized HDL development


Tooling and automation


Complex debugging and performance optimization




Collaborate with RF, hardware, and embedded software teams to ensure successful system integration


Provide technical mentorship, design feedback, and best-practice guidance to engineers (no direct reports)


Influence verification strategy, simulation approach, documentation standards, and integration readiness


Evaluate timing closure, interface design, and architectural tradeoffs across multiple systems


Support hardware bring-up and integration within Linux-based environments



Required Qualifications


U.S. Citizenship and ability to obtain a security clearance


Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field


Professional experience developing FPGA designs using Verilog, VHDL, or similar


Experience providing technical direction or architecture ownership


Strong understanding of digital system design, timing analysis, and hardware interfaces


Experience with high-speed and control interfaces such as:


PCIe, SPI, I²C


AXI, Aurora, JESD




Understanding of how digital logic integrates within RF or mixed-signal systems


Ability to work across programs and think at the system level



Preferred Experience


Master’s degree in a related field


Python, C/C++, or scripting for automation and test


Linux development experience (user space, drivers, Yocto, or PetaLinux)


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